Spi Nand Flash Usage Guide*
Notes:
- Flash operation addresses start from 0 and should not exceed the maximum flash size.
- Erase must be performed before writing data.
- Write/Read: Operation addresses should be aligned to page (2K) size, and the length should also be an integer multiple of the page size.
- Erase: Operation addresses should be aligned to block (128K) size, and the erase size should also be an integer multiple of the block size.
- Bad blocks do not need to be handled when calling read, write, erase interfaces; the driver handles them internally.
1. Project-Related Examples*
Example locations:
- Example App Demo:
app/spi_nand_flash_sample/spi_nand_flash_sample.c - Default configuration:
configs/release/nationalchip/grus_gx8002b_dev_1v4_spi_nand_flash_sample.config
Usage:
$ cp configs/release/nationalchip/grus_gx8002b_dev_1v4_spi_nand_flash_sample.config .config
$ make defconfig
$ make clean;make
2. Pin Multiplexing Notes*
Ensure the Spi Master pin multiplexing is configured correctly.
- Run
make menuconfig - Enter
Board Options - Select
BOARD_HAS_SPI_MASTER
The file boards/nationalchip/grus_gx8002b_dev_1v/misc_board.c performs the relevant configuration.
#if defined(CONFIG_BOARD_HAS_SPI_MASTER)
ret += _BoardPadmuxSet(7, 4);
ret += _BoardPadmuxSet(8, 4);
ret += _BoardPadmuxSet(9, 4);
ret += _BoardPadmuxSet(10, 4);
#endif
3. Related API Call Notes*
3.1. Header File Inclusion:*
#include <board_config.h>
#include <driver/gx_flash.h>
3.2. Initialization Notes:*
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3.3. Read, Write, Erase Notes:*
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