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Memory distribution*

1. Overview*

The GX8002 has an integrated SRAM and is 208K in size. The distribution of memory is mainly planned through the 'link.ld' link script file of the SDK project.

2. Runtime memory distribution*

The following diagram shows the memory distribution at runtime. We divide the memory into three blocks: npu memory block, mcu_stage2 memory block, and audio_in_sram memory block .

2.1 npu memory block*

  • If npu run in flash, that means the cmd and weights of the model are stored in flash, and npu obtains cmd and weights from flash in xip mode. Then the npu in the figure above stores the data_content of the model, which is the interaction space required by the npu runtime. NPU_SRAME_SIZE must be greater than or equal to sizeof(data_content)
  • If npu run in sram, the cmd and weights of the model are stored in sram, So the npu in the figure above stores cmd + weights + data_content of the model, which is the interaction space required by the npu running. NPU_SRAME_SIZE must be greater than or equal to sizeof(cmd) + sizeof(weights) + sizeof(data_content)
  • NPU_SRAME_SIZE Use menuconfig to configure the following figure:

2.2 mcu_stage2 Memory block*

  • This is the stage2 code for the project.

2.3 audio_in_sram Memory block*

  • When GX8002 sleeps, the audio in module inside the chip will continue to work, and the required memory space is in the audio_in_sram memory block. Generally, we store the logfbank characteristic data of audio in here. This ensures that the logfbank signature data before the voice vad wake up is also available.