Dynamic adjustment frequency*
This paper mainly introduces how to adjust the frequency of the hardware module. The input clock of the chip's CPU, NPU, Flash and Sram modules all come from PLL.
1. PLL configuration:*
notice
Note that the pll clock configuration can only be powered on once. See the detailed source code: boards/nationalchip/grus_gx8002b_dev_1v/clock_board.c
1.1 PLL 24M configuration*
- Refer to the following code to complete the PLL 24M configuration:
boards/nationalchip/grus_gx8002b_dev_1v/clock_board.c 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
static GX_CLOCK_PLL pll = { .pll_enable = 1, .pll_in = 32768, .pll_fvco = 98304000, .pll_out = 24576000, .pll_div_in = 0, .pll_div_fb = 3071, .pll_icpsel = 2, .pll_bwsel_lpf = 0, .pll_vco_subband = 3, .pll_div_out = 1, .pll_itrim = 0, .pll_vco_trim = 4, .pll_2nd3nd_lpf = 0, .pll_lock_tiehi = 0, }; gx_clock_set_pll(&pll);
1.2 PLL 50M configuration*
- Refer to the following code to complete the PLL 50M configuration:
boards/nationalchip/grus_gx8002b_dev_1v/clock_board.c 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
static GX_CLOCK_PLL pll = { .pll_enable = 1, .pll_in = 32768, .pll_fvco = 98304000, .pll_out = 49152000, .pll_div_in = 0, .pll_div_fb = 3071, .pll_icpsel = 2, .pll_bwsel_lpf = 0, .pll_vco_subband = 3, .pll_div_out = 0, .pll_itrim = 0, .pll_vco_trim = 4, .pll_2nd3nd_lpf = 0, .pll_lock_tiehi = 0, }; gx_clock_set_pll(&pll);
2. Dynamic adjustment frequency*
-
All frequency adjustments are adjusted by the following function.
include/driver/gx_clock/gx_clock_v2.h 1 2 3 4 5 6 7 8 9
/** * @brief DIV allocation configuration * * @param module Note For details, see GX_CLOCK_MODULE * @param div Integer frequency division * * @return None */ void gx_clock_set_div(GX_CLOCK_MODULE module, int div)notice
The value of
divis the PLL frequency divided by the target frequency and rounded.
2.1 Dynamically adjust the CPU frequency*
- If the PLL is 50M, set the CPU frequency to 8M
1gx_clock_set_div(CLOCK_MODULE_SCPU, 6) -
If the PLL is 24 MB, set the CPU frequency to 8 MB
1gx_clock_set_div(CLOCK_MODULE_SCPU, 3)Get CPU frequency
int cpu_fre = gx_clock_get_module_frequence(CLOCK_MODULE_SCPU);
2.2 Dynamically adjust the NPU frequency*
- If the PLL is 50M, set the NPU frequency to 8M
1gx_clock_set_div(CLOCK_MODULE_NPU, 6) -
If the PLL is 24M, set the NPU frequency to 8M
1gx_clock_set_div(CLOCK_MODULE_NPU, 3)Obtain the NPU frequency
int npu_fre = gx_clock_get_module_frequence(CLOCK_MODULE_NPU);
2.3 Dynamically adjust the Flash frequency*
- In the case of PLL 50M, set the Flash frequency to 50M
1gx_clock_set_div(CLOCK_MODULE_FLASH_SPI, 1) -
When the PLL is 24M, the Flash frequency is set to 24M
1gx_clock_set_div(CLOCK_MODULE_FLASH_SPI, 1)Get Flash frequency
int flash_fre = gx_clock_get_module_frequence(CLOCK_MODULE_FLASH_SPI);
2.4 Dynamically adjust Sram frequency*
- In the case of PLL 50M, Sram frequency is adjusted to 25M
1gx_clock_set_div(CLOCK_MODULE_SRAM, 2) -
In the case of PLL 24M, the Sram frequency is adjusted to 12M
1gx_clock_set_div(CLOCK_MODULE_SRAM, 2)Gets the Sram frequency
int sram_fre = gx_clock_get_module_frequence(CLOCK_MODULE_SRAM);
notice
-
It is recommended that we first call
unsigned int state = gx_lock_irq_save()to get the current interrupt state and close the interrupt. Then callgx_clock_set_div(GX_CLOCK_MODULE module, int div)for frequency modulation. The frequency modulation process is instantaneous, and the end of the interface operation means that frequency modulation is complete. Finally,gx_unlock_irq_restore(state)is called to restore the currently saved interrupt. -
For details, see Interface
LvpDynamiciallyAdjustCpuFrequencyinlvp/common/lvp_system_init.c unsigned int gx_clock_get_module_frequence(GX_CLOCK_MODULE module)This interface is used to obtain the module clock frequency